The present invention relates to generally an input signal control device and more particularly an interface circuit for feeding control data into a serial-printer control system.
In general, the printer control circuit processes the received control data so as to generate various signals for actuating various mechanisms in a serial printer. Data processors have been widely used for processing control data. Control data include character data for actuating a print wheel and printing desired characters, carriage data for controlling the shift of a carriage, paper-feed data for rotating a platen through a predetermined angle, and so on. These control data arrive at the printer control circuit together with a strobe pulse which identifies or specifies the information that the associated data conveys. Therefore, the strobe pulses are a character strobe pulse, a carriage strobe pulse, a paper-feed strobe pulse, and so on. The strobe pulses and their associated data arrive at a high data-flow rate of the order of nanoseconds, but the data processor incorporated in the printer control circuit can only execute the received data at a rate of microseconds. It follows, therefore, that if the control data were fed at a high rate into the printer control circuit which can operate only at an extremely slow rate as compared with a high rate of data flow, the printer control circuit could not process the received data correctly. Therefore, there must be provided an interface or a buffer for storing temporarily the incoming control data so as to compensate for the difference between a high rate of the incoming data flow and a slow rate of data flow through the printer control circuit.
In response to the control data arriving continuously, the printer control circuit changes its control sequence. Therefore, the input data items must be processed in the order they have arrived. That is, the input data items must propagate through the interface in a first-in-first-out manner so that the correct control by the printer control circuit can be ensured.
There have been devised and demonstrated various systems for satisfying such requirements as described above. For instance, U.S. Pat. No. 4,035,781 discloses a system comprising a data register for storing therein input data, a priority logic circuit for sensing the order of arrival of the data items at the data register, and an output bus assembler for controlling the delivery of data items from the data register in response to the output from the priority logic circuit, whereby data items are fed into a printer control circuit in a first-in-first-out manner. A tag attached to a data item is encoded into an address signal which specifies a storage location in the data register at which is stored the data item. The storage locations are fixed previously depending upon the categories of the input data items. Therefore, the priority logic circuit must be provided so as to sense and store the order of arrival of input data items in the data register. The output bus assembler must be provided so that in response to the output from the priority logic circuit, the stored data items are read out in a first-in-first-out manner.